Differential pair active load contradiction

My answer (March 1, 2021) to SE EE question Differential pair active load contradiction



And another time I said that Razavi's book is not the place where you can find an intuitive explanation. So even now, seeing the unconvincing explanations for this famous circuit solution... and then the specific detailed explanations in the following answers, I could not stop explaining the idea in ashort answer. There he is...

My answer

"Active load" is an abstract circuit concept but it can be explained in a simple intuitive way by more elementary electrical concepts as voltage divider, potentiometer, variable resistor, etc...

So, M2 and M4 can be considered as two variable "resistors" R2 and R4 in series forming a variable "voltage divider"... or a sensitive "potentiometer" - Fig. 1. It is controlled in a differential manner so that when R2 increases, R4 decreases and vice versa (the resistance crossfades). As a result, the total resistance R2 + R4 stays constant, the common current I = Vdd/(R2 + R4) does not change... but the output voltage vigorously changes; hence the high gain.



Fig. 1. Full active load - concept

Like any voltage divider configuration, this stage has a voltage output that does not need a load current; on the contrary, it "likes" to work without load (open circuit). So any "current-based explanations" (including these in Razavi's book) are absurd when introducing the main idea of the standalone active load stage. Their place is later, when the next stage is connected, a load current is consumed and the active load stage does not work at "ideal" load conditions.

I have explained many times this extremely simple but clever circuit idea to my students in such a simple way based on their intuition and common sense... and they have always grasped it instantly. I introduce it in the very beginning of my course when talking about passive resistor circuits.

See also my more detailed answer and the discussion about the exotic current feedback amplifier (its output stage is based on the same idea).

My comments

  1. What prevents people from expressing themselves in this way? The transistor is a variable resistor... so the network of a transistor + collector resistor is a variable voltage divider with one varying resistance, the other is static… in the simple active load stage, the other resistance is dynamic (self-varying) so the network is a dynamic voltage divider... in the more sophisticated (OP's) current-mirror active-load stage, both resistances are differentially varying and dynamic... so this network is a fully dynamic voltage divider...
  2. Really, when the input base-emitter voltage is constant, the transistor output collector-emitter part behaves as a "constant-current dynamic resistor". The simple active load is implemented in this way. In the OP's circuit, the active load is additionally controlled from the side of the input in an opposite direction. Thus we obtain a fully symmetric pair of two differentially controlled dynamic resistors. I rememver that, in the 70's, my teacher on Amplifier devices called this pair of two confronting transistors "controlled active load".
  3. There is a problem but I use such a scenario to explain what a transistor is: First, I say the transistor is a "resistor" because it dissipates power. After, I clarify that it is not the 19-century Ohmic resistor but a "non-linear resistor" (draw its output IV curve). Then, I show that it is actually a "dynamic resistor" (draw the rotating IV curve of its instant static resistance). Finally, I begin changing Rc (your comment) and illustrate graphically how the intersection (operating) point moves almost horizontally.
  4. I am most annoyed by "explanations" such as "the transistor changes its collector current". How does it change it? Generally speaking, at constant supply voltage, the only way it can do this is by changing its resistance (no matter linear or non-linear)... there is nothing else to change. But in short, we say directly the end result - that the current is changing and not the reason for this change.

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